Abdullah Hassaan Ahmad
Lahore
Summary
ASIC Design Engineer with 1+ years of experience in RTL design/Verification using Verilog/SV, UVM, and C/C++. Skilled in creating test benches, collaborating with cross-functional teams, and developing complex systems. Looking for a dynamic role in a prestigious organization to contribute in my best ability.
Overview
2
2
years of professional experience
1
1
Certification
Work History
ASIC Design Verification Engineer
10xEngineers
03.2023 - Current
- Developed and optimized UVM-based Testbench for wishbone-compatible I2C master core and wrote self-checking sequences to verify the read and write operations of I2C
- Delivered a talk on the “Basics of I2C” in the company’s monthly Meetup
- Developed a layered tb in System Verilog for AHB-Lite Slave Protocol
- Developed and integrated UVM tb for unit level stage of PULPissimo SOC ( units: I2Cs-APB, Logarithmic interconnect (consisting of both XBAR-L2 and XBAR-Bridge), also including the Functional Coverage and Code Coverage (Block, Statement, Expression and Toggle) of the Crossbars). Also, wrote a comprehensive Test-plan for the Crossbars and wrote a scoreboard to check the results.
- Developed a UVM TB for LPHY layer (receiver) at the UE (user equipment) end of the 5G.
Education
BSc Electrical Engineering -
University of Engineering And Technology, LHR
06.2023
Skills
- Expertise in designing and implementing complex ASICs
- Proficiency in Verilog/SystemVerilog for logic design and test bench creation
- Universal Verification Methodology (UVM)
- Strong programming skills in C/C for hardware tasks
- Test Plan Writing and Implementation
- Testbench Architecture Development (System Verilog, UVM)
- Verification Components Development (UVCs, Models, BFMs)
- Functional and Code Coverage Analysis
- Assertions, Checkers, and Monitors Implementation
- Debugging and Regression Triage
- Simulation and EDA Tools (VCS, NCSIM, Questa, Verdi)
- On-Chip Bus Interfaces (AMBA AXI, OCP, PIPE)
- PCI Express/CXL Design and Verification
- Unix/Linux Environment Proficiency
- Cadence Xcelium
- Synopsys VCS
- MentorGraphics QuestaSim
- Ability to collaborate with hardware and software teams
- Basic knowledge of networking protocols
- Proficiency in both English
- Strong teamwork, self-motivation, and communication skills
Certification
AI Infrastructure and Operations Fundamentals (GPU Computing) - NVIDIA
Languages
English
Proficient
C2
Urdu/Hindi (Native Language)
Proficient
C2
Mandarin
Beginner
A1
Volunteer Experience
- IEEE UET, Lahore
- IET UET, Lahore
Additional Information
Github: https://github.com/AbdullahHassaan-10xe
Timeline
ASIC Design Verification Engineer
10xEngineers
03.2023 - Current
BSc Electrical Engineering -
University of Engineering And Technology, LHR
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